APA

Jespers P., . (2010). The gm/Id methodology, a sizing tool for low-voltage analog CMOS circuits : the semi-empirical and compact model approaches. New York: Springer.

Chicago

Jespers Paul, . 2010. The gm/Id methodology, a sizing tool for low-voltage analog CMOS circuits : the semi-empirical and compact model approaches. New York: Springer.

Harvard

Jespers P., . (2010). The gm/Id methodology, a sizing tool for low-voltage analog CMOS circuits : the semi-empirical and compact model approaches. New York: Springer.

MLA

Jespers Paul, . The gm/Id methodology, a sizing tool for low-voltage analog CMOS circuits : the semi-empirical and compact model approaches. New York: Springer. 2010.