Logo

Description automatically generated
विद्यार्जन
 संसाधन केंद्र, भारतीय प्रौद्योगिकी संस्थान इन्दौर
Learning Resource Center, Indian Institute of Technology Indore

ऑनलाइन सार्वजनिक अभिगम प्रसूची
Online Public Access Catalogue (OPAC)

Amazon cover image
Image from Amazon.com

Tradeoffs and optimization in analog CMOS design

By: Material type: TextTextPublication details: Chichester John wiley 2008Description: xxxv, 594 p. ; 25 cmISBN:
  • 9780470031360
Subject(s): DDC classification:
  • 621.38152 BIN
Star ratings
    Average rating: 0.0 (0 votes)
Holdings
Item type Current library Call number Status Date due Barcode Item holds
Book Book LRC, IIT Indore 2nd Floor - General Stack 621.38152 BIN (Browse shelf(Opens below)) Available 11093
Total holds: 0

Copyright © 2024, 2021, 2017 Indian Institute of Technology Indore. All Rights Reserved.
Managed & maintained by Learning Resource Center, IIT Indore

Powered by Koha